<parts>
  <regblock  name="I/O_REG" start="0x0020" end="0x005F" offset="0x0020">
      
    <register  name="TWBR"    addr="0x0000"  reset=""  mask="" 
               bits="TWBR0,TWBR1,TWBR2,TWBR3,TWBR4,TWBR5,TWBR6,TWBR7" />
               
    <register  name="TWSR"    addr="0x0001"  reset="11111000"  mask="00000011" 
               bits="TWPS0,TWPS1,0,TWS3,TWS4,TWS5,TWS6,TWS7" />
      
    <register  name="TWAR"    addr="0x0002"  reset="11111110"  mask="" 
               bits="TWGCE,TWA0,TWA1,TWA2,TWA3,TWA4,TWA5,TWA6" />
      
    <register  name="TWDR"    addr="0x0003"  reset="11111111"  mask="" 
               bits="TWD0,TWD1,TWD2,TWD3,TWD4,TWD5,TWD6,TWD7" />
               
    <register  name="ADCL"    addr="0x0004"  reset=""  mask="00000000" bits="" />
    <register  name="ADCH"    addr="0x0005"  reset=""  mask="00000000" bits="" />
    
    <register  name="ADCSRA"  addr="0x0006"  reset=""  mask="" 
               bits="ADPS0,ADPS1,ADPS2,ADIE,ADIF,ADFR,ADSC,ADEN" />
               
    <register  name="ADMUX"   addr="0x0007"  reset=""  mask="11101111" 
               bits="MUX0,MUX1,MUX2,MUX3,0,ADLAR,REFS0,REFS1" />
      
    <register  name="ACSR"    addr="0x0008"  reset=""  mask="11011111" 
               bits="ACIS0,ACIS1,ACIC,ACIE,ACI,ACO,ACBG,ACD" />
               
    <register  name="UBRRL"   addr="0x0009"  reset=""  mask="" bits="" />
               
    <register  name="UCSRB"   addr="0x000A"  reset=""  mask="11111101" 
               bits="TXB8,RXB8,UCSZ2,TXEN,RXEN,UDRIE,TXCIE,RXCIE" />
               
    <register  name="UCSRA"   addr="0x000B"  reset="00100000"  mask="01000011" 
               bits="MPCM,U2X,PE,DOR,FE,UDRE,TXC,RXC" />

    <register  name="UDR"     addr="0x000C"  reset=""  mask="" bits="" />
    
    <register  name="SPCR"    addr="0x000D"  reset=""  mask="" 
               bits="SPR0,SPR1,CPHA,CPOL,MSTR,DORD,SPE,SPIE" />

    <register  name="SPSR"    addr="0x000E"  reset=""  mask="00000001" 
               bits="SPI2X,0,0,0,0,0,WCOL,SPIF" />

    <register  name="SPDR"    addr="0x000F"  reset=""  mask="" bits="" />
    
    <register  name="PIND"    addr="0x0010"  reset=""  mask="00000000" 
               bits="PIND0,PIND1,PIND2,PIND3,PIND4,PIND5,PIND6,PIND7" />

    <register  name="DDRD"    addr="0x0011"  reset=""  mask="" 
               bits="DDD0,DDD1,DDD2,DDD3,DDD4,DDD5,DDD6,DDD7" />

    <register  name="PORTD"   addr="0x0012"  reset=""  mask="" 
               bits="PORTD0,PORTD1,PORTD2,PORTD3,PORTD4,PORTD5,PORTD6,PORTD7" />
    
    <register  name="PINC"    addr="0x0013"  reset=""  mask="00000000" 
               bits="PINC0,PINC1,PINC2,PINC3,PINC4,PINC5,PINC6,0" />

    <register  name="DDRC"    addr="0x0014"  reset=""  mask="01111111" 
               bits="DDC0,DDC1,DDC2,DDC3,DDC4,DDC5,DDC6,0" />

    <register  name="PORTC"   addr="0x0015"  reset=""  mask="01111111" 
               bits="PORTC0,PORTC1,PORTC2,PORTC3,PORTC4,PORTC5,PORTC6,0" />
    
    <register  name="PINB"    addr="0x0016"  reset=""  mask="00000000" 
               bits="PINB0,PINB1,PINB2,PINB3,PINB4,PINB5,PINB6,PINB7" />

    <register  name="DDRB"    addr="0x0017"  reset=""  mask="" 
               bits="DDB0,DDB1,DDB2,DDB3,DDB4,DDB5,DDB6,DDB7" />

    <register  name="PORTB"   addr="0x0018"  reset=""  mask="" 
               bits="PORTB0,PORTB1,PORTB2,PORTB3,PORTB4,PORTB5,PORTB6,PORTB7" />
    
    <register  name="EECR"    addr="0x001C"  reset=""  mask="00001111" 
               bits="EERE,EEWE,EEMWE,EERIE,0,0,0,0" />

    <register  name="EEDR"    addr="0x001D"  reset=""  mask="" bits="" />

    <register  name="EEARL"   addr="0x001E"  reset=""  mask="" 
               bits="EEAR0,EEAR1,EEAR2,EEAR3,EEAR4,EEAR5,EEAR6,EEAR7" />

    <register  name="EEARH"   addr="0x001F"  reset=""  mask="00000001" 
               bits="EEAR8,0,0,0,0,0,0,0" />
    
    <register  name="UCSRC"   addr="0x0020"  reset="00000110"  mask="" 
               bits="UCPOL,UCSZ0,UCSZ1,USBS,UPM0,UPM1,UMSEL,URSEL" />

    <!-- kkregister  name="UBRRH"   addr="0x0020"  reset=""  mask="00001111" -->
    
    <register  name="WDTCR"   addr="0x0021"  reset=""  mask="00011111" 
               bits="WDP0,WDP1,WDP2,WDE,WDCE" />
    
    <register  name="ASSR"    addr="0x0022"  reset=""  mask="00001111" 
               bits="TCR2BUB,OCR2UB,TCN2UB,AS2" />
    
    <register  name="OCR2"    addr="0x0023"  reset=""  mask="" bits="" />
    
    <register  name="TCNT2"   addr="0x0024"  reset=""  mask="" bits="" />
               
    <register  name="TCCR2"   addr="0x0025"  reset=""  mask="" 
               bits="CS20,CS21,CS22,WGM21,COM20,COM21,WGM20,FOC2" />
    
    <register  name="ICR1L"   addr="0x0026"  reset=""  mask="" bits="" />
    <register  name="ICR1H"   addr="0x0027"  reset=""  mask="" bits="" />
    <register  name="OCR1BL"  addr="0x0028"  reset=""  mask="" bits="" />
    <register  name="OCR1BH"  addr="0x0029"  reset=""  mask="" bits="" />
    <register  name="OCR1AL"  addr="0x002A"  reset=""  mask="" bits="" />
    <register  name="OCR1AH"  addr="0x002B"  reset=""  mask="" bits="" />
    <register  name="TCNT1L"  addr="0x002C"  reset=""  mask="" bits="" />
    <register  name="TCNT1H"  addr="0x002D"  reset=""  mask="" bits="" />
    <register  name="TCCR1B"  addr="0x002E"  reset=""  mask="11011111" 
               bits="CS10,CS11,CS12,WGM12,WGM13,0,ICES1,ICNC1" />
    
    <register  name="TCCR1A"  addr="0x002F"  reset=""  mask="" 
               bits="WGM10,WGM11,FOC1B,FOC1A,COM1B0,COM1B1,COM1A0,COM1A1" />
    
    <register  name="SFIOR"   addr="0x0030"  reset=""  mask="00001111" 
               bits="PSR10,PSR2,PUD,ACME" />
               
    <register  name="OSCCAL"  addr="0x0031"  reset=""  mask="" bits="" />
    <register  name="TCNT0"   addr="0x0032"  reset=""  mask="" bits="" />
    <register  name="TCCR0"   addr="0x0033"  reset=""  mask="00000111" 
               bits="CS00,CS01,CS02" />

    <register  name="MCUCSR"  addr="0x0034"  reset=""  mask="00001111" 
               bits="PORF,EXTREF,BORF,WDRF" />

    <register  name="MCUCR"   addr="0x0035"  reset=""  mask="" 
               bits="ISC00,ISC01,ISC10,ISC11,SM0,SM1,SM2,SE" />
               
    <register  name="TWCR"    addr="0x0036"  reset=""  mask="11110101" 
               bits="TWIE,0,TWEN,TWWC,TWSTO,TWSTA,TWEA,TWINT" />
    
    <register  name="SPMCR"   addr="0x0037"  reset=""  mask="11011111" 
               bits="SPMEN,PGERS,PGWRT,BLBSET,RWWSRE,0,RWWSB,SPMIE" />

    <register  name="TIFR"   addr="0x0038"  reset=""  mask="11111101" 
               bits="TOV0,0,TOV1,OCF1B,OCF1A,ICF1,TOV2,OCF2" />

    <register  name="TIMSK"  addr="0x0039"  reset=""  mask="11111101" 
               bits="TOIE0,0,TOIE1,OCIE1B,OCIE1A,TICIE1,TOIE2,OCIE2" />

    <register  name="GIFR"    addr="0x003A"  reset=""  mask="" 
               bits="0,0,0,0,0,0INTF0,INTF1" />

    <register  name="GICR"   addr="0x003B"  reset=""  mask="" 
               bits="IVCE,IVSEL,0,0,0,0,INT0,INT1" />
    
    <register  name="SPL"     addr="0x003D"  reset=""  mask="" bits="" />
    <register  name="SPH"     addr="0x003E"  reset=""  mask="" bits="" />
  </regblock>
  <datablock name="RAM" start="0x0060" end="0x045F"/>

  <stack  spreg="SPL,SPH" increment="postdec" />
</parts>
